Monitoring Network Selection in Semiconductor Manufacturing Process

The monitoring of spatial production processes typically involves sampling network to gather information about the status of the process. Sampling costs are often not marginal and once the process has been accurately calibrated, in order to save money, it might be appropriate to reduce the dimension of the sampling grid. In some cases, the allocation of a new network of less dimension is not free of constraints and it might be necessary the selection of a subgrid extracted from the original network (Borgoni and Zappa, 2017). We discuss a computer intensive method to find the best balance between the grid representativeness, i.e. how much the new grid represents the starting network, the grid accuracy, i.e. how much the new grid is close to the subgrid that will be extracted from the full network, and the spatial coverage, i.e. how much the selected subgrid is spatially spread and able to represent the sample space. In a not constrained context, the best allocation of a networks of a given size on a bounded domain is an issue widely discussed in the literature (see Dean et al, 2015, for a recent comprehensive book). In general, in our context, given a network defined according to some criteria, two are the issues we have to face with. First, how to find the subgrid maximally representative of both the sample space and the assigned grid. Furthermore, if no information are available about the shape of the response surface, because the experimental domain is circular, any grid can be rotated while keeping invariant its optimality property. Second, it is necessary to assess the prediction accuracy when the subgrid is used to estimate the expected response surface. Additionally, the procedure must be flexible so that it can be applied whatever is the initial network and able to include, if available, expert knowledge about sub regions. For example, in semiconductor processes, engineers know that the production process close to the borders of the wafer is often affected by less precision than the one placed at the centre of the wafer. Hence they suggest, whereas possible, to oversample the former part of the wafer. The solution to the overall problem may need a not negligible computational time. Efficient R codes have been prepared. To explore the capability and the limit of our approach, we compare sampling designs that are commonly used to monitor semiconductor processes. Among the alternatives we have chosen: a wafer space oriented design, Latin-hypercubes designs (Lh), k-means designs and, in order to benchmark the properties of the grids extracted by the previous designs, we have chosen a not strictly optimal designs obtained by allocating a random grid. The last part of the presentation will show an extension of the proposal with its capability to grasp information form rational subgroups to measure process capability indices in case of mixtures.